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AM29F400BB-55SE0

Category: IC Chips

Description: Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44

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1.94882 3.77190

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  • AM29F400BB-55SE0 Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44
Part Number Seller's Name Stock Brand Package/Case Date Code Description Price

AM29F400BB-55SE0

AM29F400BB-55SE0 has several brands around the world that may have alternate names for AM29F400BB-55SE0 due to regional differences or acquisition. AM29F400BB-55SE0 may also be known as the following names:

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    Description

    Part Number Product Description Summary Price Buy

    Utsource

    66794

    5.0 out of 5 stars

    1 star 0.1%
    2 star 0%
    3 star 0.2%
    4 star 0.3%
    5 star 99.3%

    Total products: 2397898

    Total sales: 12642705

    Average lead time: 0 Hour

    Delivery times (Express): 0Deliverytimes

    Delivery times (Post office): 0

    AM29F400BB-55SE0 Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44
    AM29F400BB-55SE0

    Stock:9999

    USED

    AMD

    Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44

    ≥1: US $3.77190 US $3.39471

    ≥5: US $2.51460 US $2.26314

    ≥10: US $2.26314 US $2.03683

    ≥20: US $2.20028 US $1.98025

    ≥50: US $2.13741 US $1.92367

    ≥100: US $2.07454 US $1.86708

    ≥200: US $2.01168 US $1.81051

    ≥500: US $1.98653 US $1.78788

    ≥1000: US $1.94882 US $1.75394

    More: Inquiry

    AM29F400BB-55SE0 Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44
    AM29F400BB-55SE0

    Stock:10000

    USED

    Flash, 256KX16, 55ns, PDSO44, MO-180AA, SOP-44

    ≥1: US $2.79400 US $2.51460

    ≥5: US $2.65430 US $2.38887

    ≥10: US $2.51460 US $2.26314

    ≥20: US $2.44475 US $2.20028

    ≥50: US $2.37490 US $2.13741

    ≥100: US $2.30505 US $2.07455

    ≥200: US $2.23520 US $2.01168

    ≥500: US $2.20726 US $1.98653

    ≥1000: US $2.16535 US $1.94882

    More: Inquiry

    Bo Cheng Wei Electronics Co.,Ltd.

    2720

    5.0 out of 5 stars

    1 star 0.2%
    3 star 0.7%
    4 star 0.7%
    5 star 98.5%

    Total products: 15415

    Total sales: 95379

    Average lead time: 0 Hour

    Delivery times (Express): 0Deliverytimes

    Delivery times (Post office): 0

    AM29F400BB-55SE0 N/A
    AM29F400BB-55SE0

    Stock:310

    USED

    12+

    N/A

    ≥1: US $2.01168 US $1.81051

    More: Inquiry

    AM29F400BB-55SE0 N/A
    AM29F400BB-55SE0

    Stock:310

    USED

    12+

    N/A

    ≥1: US $2.01168 US $1.81051

    More: Inquiry

    DISTINCTIVE CHARACTERISTICS

    Single power supply operation

    5.0 volt-only operation for read, erase, and program operation

    Minimizes system level requirements

    Manufactured on 0.32μm process technology

    Compatible with 0.5 μm Am29F400 device

    High performance

    Access times as fast as 45 ns

    Low power consumption (typical values at 5 MHz)

    1μA standby mode current

    20mA read current (byte mode)

    28mA read current (word mode)

    30mA program/erase current

    Flexible sector architecture

    One 16Kbyte, two 8Kbyte, one 32Kbyte, and seven 64Kbyte sectors (byte mode)

    One 8Kword, two 4Kword, one 16Kword, and seven 32Kword sectors (word mode)

    Supports full chip erase

    Sector Protection features:

    A hardware method of locking a sector to prevent any program or erase operations within that sector

    Sectors can be locked via programming equipment

    Temporary Sector Unprotect feature allows code changes in previously locked sectors

    Top or bottom boot block configurations

    Embedded Algorithms

    Embedded Erase algorithm automatically preprograms and erases the entire chip or any combination of designated sectors

    Embedded Program algorithm automatically writes and verifies data at specified addresses

    Minimum 1,000,000 program/erase cycles per sector guaranteed

    20-year data retention at 125°C

    Reliable operation for the life of the system

    Package option

    48-pin TSOP

    44-pin SO

    Known Good Die (KGD)(see publication number 21258)

    Compatibility with JEDEC standards

    Pinout and software compatible with single-power-supply Flash

    Superior inadvertent write protection

    Data# Polling and toggle bits

    Provides a software method of detecting program or erase operation completion

    Ready/Busy# pin (RY/BY#)

    Provides a hardware method of detecting program or erase cycle completion

    Erase Suspend/Erase Resume

    Suspends an erase operation to read data from, or program data to, a sector that is not being erased, then resumes the erase operation

    Hardware reset pin (RESET#)

    Hardware method to reset the device to reading array data

     

    GENERAL DESCRIPTION

    The Am29F400B is a 4Mbit, 5.0 volt-only Flash memory organized as 524,288 bytes or 262,144 words.The device is offered in 44-pin SO and 48-pin TSOP packages. The device is also available in Known Good Die (KGD) form. For more information, refer to publication number 21258. The word-wide data (x16) appears on DQ15–DQ0; the byte-wide (x8) data appears on DQ7–DQ0. This device is designed to be programmed in-system with the standard system 5.0 volt VCC supply. A 12.0 V VPP is not required for write or erase operations. The device can also be programmed in standard EPROM programmers.

    This device is manufactured using AMD’s 0.32μm process technology, and offers all the features and benefits of the Am29F400, which was manufactured using 0.5μm process technology.

    The standard device offers access times of 45, 50, 55, 70, 90, and 120ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#) ,write enable (WE#) and output enable (OE#) controls.

    The device requires only a single 5.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.

    The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.

    Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm-an internal algorithm that automatically times the program pulse widths and verifies proper cell margin.

    Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm-an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the device automatically times the erase pulse widths and verifies proper cell margin.

    The host system can detect whether a program or erase operation is complete by observing the RY/BY# pin, or by reading the DQ7 (Data# Polling) and DQ6/DQ2 (toggle) status bits. After a program or erase cycle has been completed, the device is ready to read array data or accept another command.

    The sector erase architecture allows memory sectors to be erased and reprogrammed without affecting the data contents of other sectors. The device is fully erased when shipped from the factory.

    Hardware data protection measures include a low VCC detector that automatically inhibits write operations during power transitions. The hardware sector protection feature disables both program and erase operations in any combination of the sectors of memory. This can be achieved via programming equipment.

    The Erase Suspend feature enables the user to put erase on hold for any period of time to read data from, or program data to, any sector that is not selected for erasure. True background erase can thus be achieved.

    The hardware RESET# pin terminates any operation in progress and resets the internal state machine to reading array data. The RESET# pin may be tied to the system reset circuitry. A system reset would thus also reset the device, enabling the system microprocessor to read the boot-up firmware from the Flash memory.

    The system can place the device into the standby mode. Power consumption is greatly reduced in this mode. AMD’s Flash technology combines years of Flash memory manufacturing experience to produce the highest levels of quality, reliability and cost effectiveness. The device electrically erases all bits within a sector simultaneously via Fowler-Nordheim tunneling. The data is programmed using hot electron injection.


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