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$CD74HCT670E The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE\) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE\) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE\) is low. The output is in the high impedance state when the (RE\) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits.$

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CD74HCT670E

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Description

The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE\) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE\) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE\) is low. The output is in the high impedance state when the (RE\) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits.

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Title

High Speed CMOS Logic 4-by-4 Register File

ECAD Module
Series: 74HCT
Brand: Harris
Package / Case: DIP16
Packaging: Tube
Part Status: Active
Logic Type: Register File
Output Type: Tri-State
Number of Elements: 1
Number of Bits per Element: 4
Function: Universal
Voltage - Supply: 4.5 V ~ 5.5 V
Operating Temperature: -55°C ~ 125°C
Mounting Type: Through Hole
Supplier Device Package: 16-PDIP

Similar Models SN54LS670 SN74LS670

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ECAD Module

Product Attributes

Description: The CD74HCT670E is a high-speed CMOS logic device that is pin and functionally compatible with the 74LS670. Features: Wide supply voltage range: 2 V to 6 V High speed: tpd = 4.5 ns (typical) at 5 V Low power consumption: ICC = 4 μA (maximum) at 5 V Inputs accept voltages up to 7 V High noise immunity: 0.45 V (typical) Applications: Analog-to-digital converters Digital-to-analog converters Clock and timing circuits Interface circuits Data acquisition systems (For reference only)

Features

● Simultaneous and Independent Read and Write Operations

● Expandable to 512 Words of n-Bits

● Three-State Outputs

● Organized as 4 Words x 4 Bits Wide

● Buffered Inputs

● Typical Read Time = 16ns for ’HC670 VCC = 5V, CL =15pF, TA = 25℃

● Fanout (Over Temperature Range)

— Standard Outputs ..........................................10 LSTTL Loads

— Bus Driver Outputs ........................................15 LSTTL Loads

● Wide Operating Temperature Range.............. -55℃ to 125℃

● Balanced Propagation Delay and Transition Times

● Significant Power Reduction Compared to LSTTL Logic ICs

● HC Types

— 2V to 6V Operation

— High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V

● HCT Types

— 4.5V to 5.5V Operation

— Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)

— CMOS Input Compatibility, Il≤1μA at VOL, VOH

Description

The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE) is low. The output is in the high impedance state when the (RE) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits.

Preview of the first 3 pages of the data sheet

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Data sheet acquired from Harris Semiconductor SCHS195C
[ /Title CD74H CT670) /Subject (HighSpeed CMOS Logic 4x4 Register
Features
Description
Significant Power Reduction Compared to LSTTL Logic ICs

HCT Types to 5.5V Operation - Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min) - CMOS Input Compatibility, 1µA at VOL, VOH

The 'HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE) is low. The output is in the high impedance state when the (RE) is high. Outputs can be tied together to increase the word capacity x 4 bits.

NOTE: When ordering, use the entire part number. The suffix 96 denotes tape and reel. The suffix T denotes a small-quantity reel of 250.

CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.

1. The Write Address (WA0 and WA1) to the "internal latches" must be stable while WE is LOW for conventional operation.

2. The selection of the "internal latches" by Read Address (RA0 and RA1) are not constrained or RE operation. H = High Voltage Level L = Low Voltage Level X= Don't Care Z = High Impedance "Off" State

DC Supply Voltage, VCC. 7V DC Input Diode Current, IIK
For VO < VCC 0.5V.±35mA DC Output Source or Sink Current per Output Pin, IO

to 6V HCT 5.5V DC Input or Output Voltage, VI, VO. 0V to VCC Input Rise and Fall Time 2V. 1000ns (Max) 4.5V. 500ns (Max) 6V. 400ns (Max)

CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

3. The package thermal impedance is calculated in accordance with JESD 51-7.
PARAMETER HC TYPES High Level Input Voltage
High Level Output Voltage CMOS Loads

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Product Reviews

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241 buyer reviews from United Kingdom

Lauren Smith

CD74HCT670E

United States

Length of registration:7 years

The CD74HCT670E is an integrated circuit from Texas Instruments that is designed for high-speed logic applications. It is a high-performance, low-power device that is capable of operating at speeds up to 25 MHz. It has a wide range of features including low-power consumption, high noise immunity, and high speed. It is also designed to be compatible with a variety of logic families. Utsource is a r

Reply0

03/17/2023

Huzii Oleksandr

CD74HCT670E

Ukraine KHARKIV

Length of registration:6 years

Reply0

06/26/2018

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CD74HCT670E The ’HC670 and CD74HCT670 are 16-bit register files organized as 4 words x 4 bits each. Read and write address and enable inputs allow simultaneous writing into one location while reading another. Four data inputs are provided to store the 4-bit word. The write address inputs (WA0 and WA1) determine the location of the stored word in the register. When write enable (WE\) is low the word is entered into the address location and it remains transparent to the data. The outputs will reflect the true form of the input data. When (WE\) is high data and address inputs are inhibited. Data acquisition from the four registers is made possible by the read address inputs (RA1 and RA0). The addressed word appears at the output when the read enable (RE\) is low. The output is in the high impedance state when the (RE\) is high. Outputs can be tied together to increase the word capacity to 512 x 4 bits.

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CD74HCT670E

CD74HCT670E has several brands around the world that may have alternate names for CD74HCT670E due to regional differences or acquisition. CD74HCT670E may also be known as the following names: