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Home page > Componenti Elettronici > Chip circuito integrato > Logica - Flip Flops
Stock:10000
Minimo:2
Consegna standard
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SOP14
FSC
Description: The 74VHC74M is a high-speed CMOS dual D-type flip-flop with reset and complementary outputs. Features: High Speed Operation Low Power Consumption High Noise Immunity Low Input Curr
The VHC74 is an advanced high speed CMOS Dual D-Type Flip-Flop fabricated with silicon gate CMOS technology. It achieves the high speed operation similar to equivalent Bipolar Schottky TTL while maintaining the CMOS low power dissipation. The signal level applied to the D input is transferred to the Q output during the positive going transition of the CK pulse. CLR# and PR# are independent of the CK and are accomplished by setting the appropriate input LOW. An input protection circuit ensures that 0V to 7V can be applied to the input pins without regard to the supply voltage. This device can be used to interface 5V to 3V systems and two supply systems such as battery backup. This circuit prevents device destruction due to mismatched supply and input voltages.
Stock:10000
Minimo:3
Consegna standard
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Stock:10000
Minimo:3
Consegna standard
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VSSOP-8
Fairchil
06+
Description: The NC7SZ74K8X is a single 2-input positive-NAND Schmitt trigger logic gate from Fairchild Semiconductor. It is housed in a VSSOP-8 package. Features: Low power consumption High noise
TinyLogic UHS D-Type Flip-Flop with Preset and Clear
Stock:10000
Minimo:12
Consegna standard
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Stock:10000
Minimo:2
Consegna standard
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Stock:10000
Minimo:1
Consegna standard
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SOP-14
Texas Instruments
05+
SN74HC74D is a dual D-type flip-flop with set and reset logic gates from Texas Instruments. It is a 14-pin small outline package (SOP) device. Description: The SN74HC74D is a dual D-type flip-flop w
1A, 8V,±4% Tolerance, Voltage Regulator, Ta = 0°C to +125°C; Package: DPAK 4 LEAD Single Gauge Surface Mount; No of Pins: 4; Container: Tape and Reel; Qty per Container: 2500
Stock:10000
Minimo:4
Consegna standard
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Stock:10000
Minimo:2
Consegna standard
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Consegna standard: Arrivo previsto {0}
Stock:10000
Minimo:4
Consegna standard
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SOP
Texas Instruments
9936+
Parameter Symbol Conditions Min Typ Max Unit Supply Voltage VCC Operating 2.0 - 6.0 V Input Low Voltage VIL - 0.0 - 0.8 V Input High Voltage VIH - 2.0 - VCC V Output Low Voltage VOL IOL =
Octal D-Type Flip-Flops With Clear 20-SOIC -40 to 85
Stock:10000
Minimo:2
Consegna standard
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SOP-14P
Texas Instruments
00+
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
Stock:10000
Minimo:13
Consegna standard
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SOP-20
Low Voltage Octal D-Type Flip-Flop with 5V Tolerant Inputs and Outputs; Package: SOIC-Wide; No of Pins: 20; Container: Rail
Stock:10000
Minimo:2
Consegna standard
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SOP-20
Texas Instruments
97+
OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
Stock:10000
Minimo:6
Consegna standard
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DIP-16
On/mot
95+
Parameter Symbol Conditions Min Typ Max Unit Supply Voltage VCC Operating 2.0 - 6.0 V Input Low Voltage VIL VCC = 4.5V to 6.0V - - 1.5 V Input High Voltage VIH VCC = 4.5V to 6.0V 3.0 - - V
Hex D Flip-Flop witth Common Clock and Reset
Stock:10000
Minimo:2
Consegna standard
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DIP-16
Ns/fsc
98+
Description: CMOS Quad Exclusive-OR Gate Feature: High Speed: tPD = 10 ns (Typical) at VDD = 10 V Low Power Consumption: ICC = 0.4 μA (Max) at TA = 25°C Wide Operating Voltage Range: VDD = 2 V to
Stock:10000
Minimo:2
Consegna standard
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Stock:10000
Minimo:1
Consegna standard
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TSSOP14
Texas Instruments
07/
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH CLEAR AND PRESET
Stock:10000
Minimo:12
Consegna standard
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DIP-16
PH2
Description: HEF4027BP is a dual 4-input NAND Schmitt trigger gate. Features: Low power consumption High noise immunity High input impedance High speed Low input current Low output
Dual JK flip-flop - Description: Dual JK Flip-Flop ; Fmax: 30 @ 15 V MHz; Logic switching levels: CMOS ; Number of pins: 16 ; Output drive capability: +/- 2.4 mA @ 15 V ; Power dissipation considerations: Low Power or Automotive Applications ; Propagation delay: 30@15V ns; Voltage: 4.5-15.5; Package: SOT38-4 DIP16; Container: Bulk Pack, CECC
Stock:10000
Minimo:3
Consegna standard
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CDIP16
On Semi
01+
Dual In/Single Out Autoswitching Power MUX, Manual/Auto Sw, Adj. Cur Limit, Adj. Vol Threshold 8-TSSOP -40 to 85
Stock:10000
Minimo:1
Consegna standard
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DIP-14
National Semiconductor
Description: The MM74C107N is a dual J-K flip-flop with reset in a 14-pin DIP package. Features: High Speed Operation Low Power Consumption Positive Edge-Triggered Inputs Reset Inputs
8-Bit Parallel-Out Serial Shift Register
Stock:10000
Minimo:2
Consegna standard
Corriere: Arrivo previsto {0}
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Ferma gli esperti di produzione, siamo in grado di fornire un gran numero di componenti elettronici che sono stati interrotti e che sono difficili da trovare, per facilitare la società di manutenzione