Logique - Loquets

The MM74HC573 high speed octal D-type latches utilize advanced silicon-gate P-well CMOS technology. They possess the high noise immunity and low power consumption of standard CMOS integrated circuits, as well as the ability to drive 15 LS-TTL loads. Due to the large output drive capability and the 3-STATE feature, these devices are ideally suited for interfacing with bus lines in a bus organized system. When the LATCH ENABLE(LE) input is HIGH, the Q outputs will follow the D inputs. When the LATCH ENABLE goes LOW, data at the D inputs will be retained at the outputs until LATCH ENABLE returns HIGH again. When a HIGH logic level is applied to the OUTPUT CONTROL OC input, all outputs go to a HIGH impedance state, regardless of what signals are present at the other inputs and the state of the storage elements. The 74HC logic family is speed, function and pinout compatible with the standard 74LS logic family. All inputs are protected from damage due to static discharge by internal diode clamps to VCC and ground.

Dual 2-Bit Bistable Transparent Latch

IC TRANSP LATCH OCT D 3ST 20-DIP

The HEF4043BT is a quad R/S Latch with 3-state outputs with a common OE. Each latch has an active high set input (1S to 4S), an active high reset input (1R to 4R) and an active high 3-state output (1Q to 4Q). When OE is high, the latch output (nQ) is determined by the nR and nS inputs. When OE is low, the latch outputs are in the high impedance OFF-state. OE does not affect the state of the latch. The high impedance OFF-state feature allows common bussing of the outputs. It operates over a recommended VDD power supply range of 3 to 15V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS or another input.

The TPIC6273DW is a monolithic high-voltage high-current power logic octal D Latch with DMOS transistor outputs designed for use in systems that require relatively high load power. The device contains a built-in voltage clamp on the outputs for inductive transient protection. Power driver applications include relays, solenoids and other medium-current or high-voltage loads. The TPIC6273 contains eight positive-edge-triggered D-type flip-flops with a direct clear input. Each flip-flop features an open-drain power DMOS transistor output. When clear (CLR\) is high, information at the D inputs meeting the setup time requirements is transferred to the DRAIN outputs on the positive-going edge of the clock pulse. clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When the clock input (CLK) is at either the high or low level, the D input signal has no effect at the output.

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC

IC 8BIT ADDRESSABL LATCH 16-SOIC

9-BIT BUS-INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS

MSI Quad R& #8722 ;S Latches

100mA, 9V,±5% Tolerance, Voltage Regulator, Ta = -40°C to +125°C; Package: SOIC-8 Narrow Body; No of Pins: 8; Container: Tape and Reel; Qty per Container: 2500

3.3-V ABT OCTAL TRANSPARENT D-TYPE LATCHES WITH 3-STATE OUTPUTS

Octal 3-State Noninverting Transparent Latch with LSTTL-Compatible Inputs

D-Type Transparent Latch 2 Channel 8:8 IC Tri-State 48-TSSOP

Octal Transparent Latch with 3-STATE Outputs; Package: DIP; No of Pins: 20; Container: Rail

D-Type Transparent Latch 1 Channel 8:8 IC Tri-State 20-SOIC

Latch Transparent 3-ST 16-CH D-Type 48-Pin TSSOP T/R

SINGLE D-TYPE LATCH

CMOS MSIQuad R-S Latches

10-Bit D-Type Latch

Latch Addressable 8-CH D-Type 16-Pin PDIP Tube