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Logic - Flip Flops

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CD4013BCN

Enlarge

Original parts, guaranteed brand new

CD4013BCN

DIP

Fairchild

0724+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP41.39331

PHP37.25398

≥5:

PHP31.04498

PHP27.94048

≥10:

PHP21.73149

PHP19.55834

≥20:

PHP20.69666

PHP18.62699

≥50:

PHP18.62699

PHP16.76429

≥100:

PHP18.10957

PHP16.29862

≥200:

PHP17.59216

PHP15.83294

≥500:

PHP17.07474

PHP15.36727

≥1000:

PHP16.55732

PHP14.90159

From: PHP16.55732

Description: The CD4013BCN is a dual D-type flip-flop with complementary outputs. It has two independent data inputs (D and D) and two independent clock inputs (CP and CP). Features: * High speed: tp

Stock:10000

Minimum:1

Favorite

MC74ACT377N

Enlarge

Original parts, guaranteed brand new

MC74ACT377N

DIP

On Semiconductor

0236+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP64.63725

PHP58.17352

≥5:

PHP48.47793

PHP43.63014

≥10:

PHP29.08676

PHP26.17808

≥20:

PHP28.27880

PHP25.45092

≥50:

PHP27.47083

PHP24.72375

≥100:

PHP26.66286

PHP23.99658

≥200:

PHP25.85490

PHP23.26941

≥500:

PHP25.53171

PHP22.97854

≥1000:

PHP25.04693

PHP22.54224

From: PHP25.04693

Description: The MC74ACT377N is a 3-state octal D-type flip-flop with a common Clock (CP) and Output Enable (OE) inputs. Features: Wide Operating Voltage Range of 2.0 V to 6.0 V High Speed Oper

Stock:10000

Minimum:5

Favorite

SN74LS74AN

Enlarge

Used and refurbished parts guaranteed can work well

SN74LS74AN

DIP14

Texas Instruments

07+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource

≥1:

PHP47.69297

PHP42.92367

≥5:

PHP35.76971

PHP32.19277

≥10:

PHP25.03850

PHP22.53468

≥20:

PHP23.84645

PHP21.46179

≥50:

PHP21.46179

PHP19.31563

≥100:

PHP20.86581

PHP18.77919

≥200:

PHP20.26919

PHP18.24227

≥500:

PHP19.67321

PHP17.70591

≥1000:

PHP19.07714

PHP17.16939

From: PHP19.07714

SN74LS74AN is a dual positive-edge triggered D-type flip-flop with individual data (D) and clock (CP) inputs. It is a 14-pin dual in-line package (DIP) manufactured by Texas Instruments. Description:

Stock:10000

Minimum:1

Favorite

SY10E151JC

Enlarge

Used and refurbished parts guaranteed can work well

SY10E151JC

PLCC-28

Synergy

07/

6-BIT D REGISTER

Utsource

≥1:

PHP187.89164

PHP169.10250

≥5:

PHP178.49711

PHP160.64736

≥10:

PHP169.10250

PHP152.19222

≥20:

PHP164.40523

PHP147.96469

≥50:

PHP159.70789

PHP143.73708

≥100:

PHP155.01062

PHP139.50955

≥200:

PHP150.31336

PHP135.28202

≥500:

PHP148.43442

PHP133.59094

≥1000:

PHP145.61601

PHP131.05440

From: PHP145.61601

Stock:10000

Minimum:1

Favorite

SN74107N

Enlarge

Original parts, guaranteed brand new

SN74107N

DIP14

HLF

18+

IC FF JK TYPE DUAL 1BIT 14DIP

PHP19.90063

PHP17.91057

From: PHP19.90063

SN74107N is a high-level logic device that is part of the 74xx series of integrated circuits. It is a 14-pin DIP (dual in-line package) that contains four independent two-input NAND gates. Descriptio

Stock:99999

Minimum:100

Favorite

74HC174D,653

Enlarge

Original parts, guaranteed brand new

74HC174D,653

SOP

NXP Semiconductors

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥100:

PHP10.44560

PHP9.40106

≥500:

PHP10.44560

PHP9.40106

≥1000:

PHP9.64209

PHP8.67787

≥10000:

PHP9.24034

PHP8.31631

≥100000:

PHP8.83859

PHP7.95476

From: PHP8.83859

Manufacturer: NXP Description: The 74HC174D,653 is a high-speed Si-gate CMOS device and is pin compatible with low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard no. 7A.

Stock:10000

Minimum:100

Favorite

74AC74SCX

Enlarge

Used and refurbished parts guaranteed can work well

74AC74SCX

SOP-14

FSC

CMOS, Buffered, 12-Bit Multiplying DAC

Utsource

≥1:

PHP70.45937

PHP63.41344

≥5:

PHP46.97289

PHP42.27562

≥10:

PHP42.27562

PHP38.04809

≥20:

PHP41.10133

PHP36.99121

≥50:

PHP39.92695

PHP35.93425

≥100:

PHP38.75266

PHP34.87737

≥200:

PHP37.57836

PHP33.82048

≥500:

PHP37.10863

PHP33.39779

≥1000:

PHP36.40398

PHP32.76360

From: PHP36.40398

Stock:10000

Minimum:1

Favorite

MC74ACT74N

Enlarge

Original parts, guaranteed brand new

MC74ACT74N

DIP-14

Motorola

99

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP38.20921

PHP34.38829

≥5:

PHP28.65691

PHP25.79122

≥10:

PHP20.05984

PHP18.05385

≥20:

PHP19.10460

PHP17.19414

≥50:

PHP17.19414

PHP15.47473

≥100:

PHP16.71653

PHP15.04488

≥200:

PHP16.23891

PHP14.61502

≥500:

PHP15.76130

PHP14.18517

≥1000:

PHP15.28368

PHP13.75532

From: PHP15.28368

Description: The MC74ACT74N is a dual D-type flip-flop with individual data, set, reset, and clock inputs and Q and Q outputs. Features: Low Power Consumption High Speed Operation Outputs S

Stock:10000

Minimum:1

Favorite

CD74HCT534E

Enlarge

Original parts, guaranteed brand new

CD74HCT534E

PDIP-20

Texas Instruments

1342+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP153.79207

PHP138.41286

≥5:

PHP102.52805

PHP92.27524

≥10:

PHP92.27524

PHP83.04772

≥20:

PHP89.71204

PHP80.74084

≥50:

PHP87.14884

PHP78.43396

≥100:

PHP84.58564

PHP76.12707

≥200:

PHP82.02244

PHP73.82019

≥500:

PHP80.99716

PHP72.89744

≥1000:

PHP79.45924

PHP71.51331

From: PHP79.45924

Description: The CD74HCT534E is a high-speed CMOS 8-bit buffer/line driver fabricated with silicon gate C2MOS technology. Features: - High-speed operation: tPD = 8.0 ns (typical) at VCC = 5 V - Low p

Stock:10000

Minimum:1

Favorite

MC74HC174AD

Enlarge

Original parts, guaranteed brand new

MC74HC174AD

SOIC-16

Motorola

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥14:

PHP14.98143

PHP13.48331

≥50:

PHP11.23605

PHP10.11247

≥100:

PHP8.98888

PHP8.09000

≥300:

PHP8.61435

PHP7.75289

≥500:

PHP8.23974

PHP7.41577

≥1000:

PHP7.86521

PHP7.07865

≥3000:

PHP7.49068

PHP6.74162

From: PHP7.49068

Description: The MC74HC174A is an 8-bit D-type flip-flop with a common clock and asynchronous reset. Features: - High speed: tpd = 7.5 ns (typical) at VCC = 5 V - Low power dissipation: ICC = 4 μA (m

Stock:10000

Minimum:14

Favorite

SN74HC112N

Enlarge

Original parts, guaranteed brand new

SN74HC112N

DIP16

HLF

18+

IC FF JK TYPE DUAL 1BIT 16DIP

PHP15.92050

PHP14.32845

From: PHP15.92050

Stock:99999

Minimum:200

Favorite

HEF4013BT,653

Enlarge

Original parts, guaranteed brand new

HEF4013BT,653

sop

NXP Semiconductors

14+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥5:

PHP13.37322

PHP12.03590

≥100:

PHP12.25879

PHP11.03291

≥500:

PHP11.14435

PHP10.02992

From: PHP11.14435

Manufacturer: NXP Description: Dual D-Type Flip-Flop Features: Low power consumption High noise immunity Low input current High speed operation Outputs source/sink 24 mA Outputs compatib

Stock:10000

Minimum:5

Favorite

MM74HC74AM

Enlarge

Original parts, guaranteed brand new

MM74HC74AM

SOP14

FSC

08+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP11.14435

PHP10.02992

≥100:

PHP5.57218

PHP5.01496

From: PHP5.57218

Description: The MM74HC74AM is a dual D-type flip-flop with set and reset inputs. Features: Inputs Include Clamp Diodes Outputs Source/Sink 24 mA Latch-Up Performance Exceeds 250 mA Per JESD 78, Cl

Stock:10000

Minimum:10

Favorite

CD40174BCN

Enlarge

Original parts, guaranteed brand new

CD40174BCN

DIP-16

National Semiconductor

89+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP95.52302

PHP85.97072

≥5:

PHP63.68202

PHP57.31381

≥10:

PHP57.31381

PHP51.58243

≥20:

PHP55.72176

PHP50.14959

≥50:

PHP54.12971

PHP48.71674

≥100:

PHP52.53766

PHP47.28390

≥200:

PHP50.94561

PHP45.85105

≥500:

PHP50.30879

PHP45.27791

≥1000:

PHP49.35356

PHP44.41821

From: PHP49.35356

Description: The CD40174BCN is a 4-bit static shift register with parallel inputs and serial outputs. Features: 4-bit static shift register Parallel inputs and serial outputs Low power consumptio

Stock:10000

Minimum:1

Favorite

SN74HC175N

Enlarge

Original parts, guaranteed brand new

SN74HC175N

DIP16

HLF

18+

IC FF D-TYPE SNGL 4BIT 16DIP

PHP15.92050

PHP14.32845

From: PHP15.92050

Stock:99999

Minimum:200

Favorite

SN74ACT74DE4

Enlarge

Original parts, guaranteed brand new

SN74ACT74DE4

SOP14

TI Texas Instruments

1650+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

Utsource Original Store

≥1:

PHP62.35743

PHP56.12169

≥5:

PHP46.76807

PHP42.09127

≥10:

PHP32.73765

PHP29.46392

≥20:

PHP31.17872

PHP28.06084

≥50:

PHP28.06084

PHP25.25478

≥100:

PHP27.28138

PHP24.55324

≥200:

PHP26.50191

PHP23.85170

≥500:

PHP25.72244

PHP23.15016

≥1000:

PHP24.94297

PHP22.44871

From: PHP24.94297

Description: The SN74ACT74DE4 is a Dual D-Type Flip-Flop with Preset and Clear from Texas Instruments. Features: * Low power consumption * High speed * Low noise * High output drive capability * Inpu

Stock:10000

Minimum:5

Favorite

SN74AHCT16374DGGR

Enlarge

Original parts, guaranteed brand new

SN74AHCT16374DGGR

TSSOP-48

TI Texas Instruments

1719+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

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PHP233.84036

PHP210.45633

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PHP140.30422

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PHP140.30422

PHP126.27380

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PHP136.40688

PHP122.76619

≥50:

PHP132.50954

PHP119.25859

≥100:

PHP128.61220

PHP115.75098

≥200:

PHP124.71486

PHP112.24337

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PHP110.84030

≥1000:

PHP120.81752

PHP108.73577

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SN74HC74N

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SN74HC74N

DIP14

HLF

18+

IC FF D-TYPE DUAL 1BIT 14DIP

PHP6.96522

PHP6.26870

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Stock:99499

Minimum:500

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74LVTH16374MTDX

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74LVTH16374MTDX

TSSOP

FAI

10+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

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PHP13.37322

PHP12.03590

≥100:

PHP12.25879

PHP11.03291

≥500:

PHP11.14435

PHP10.02992

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Description: The 74LVTH16374MTDX is a 16-bit dual-supply bus transceiver with 3-state outputs. It is designed for asynchronous two-way communication between data buses. Features: Low voltage operati

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74ACT175SCX

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74ACT175SCX

SOP16

FSC

00+

These devices contain two independent D-type positive-edge-triggered flip-flops. A low level at the preset or clear inputs sets or resets the outputs regardless of the levels of the other inputs. When preset and clear are inactive (high), data at the D input meeting the setup time requirements are transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold time interval, data at the D input may be changed without affecting the levels at the outputs. The SN54' family is characterized for operation over the full military temperature range of -55°C to 125°C. The SN74' family is characterized for operation from 0°C to 70°C.

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PHP9.36126

PHP8.42513

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PHP7.72304

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PHP7.80105

PHP7.02094

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Description: The 74ACT175SCX is a high-speed 4-bit register with 3-state outputs. It is designed for use in high-performance memory and bus-oriented systems. Features: High-speed performance: tpd =

Stock:10000

Minimum:5

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