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Home > Elec-component > IC Chips > Logic - Buffers, Drivers, Receivers, Transceivers
DIP20
Texas Instruments
0345+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The SN74HC623N is a high-speed CMOS 8-bit shift register fabricated with silicon gate C2MOS technology. Features: High-Speed Operation: tpd = 10 ns (typ) at VCC = 5 V Low Power Consump
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SOIC-14
Texas Instruments
00+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:1
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SOIC-24
Texas Instruments
1450+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
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TSSOP20
STM
10+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:2
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TSSOP20
Fairchild
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The 74VHCT244AMTCX is a high-speed, low-power, low-voltage, quad-buffer/line driver with 3-state outputs. Features: Low-voltage operation: VCC = 2.3 V to 3.6 V High-speed performance:
Stock:10000
Minimum:2
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DIP
National Semiconductor
09+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The 74F541PC is a high-speed, low-power, octal buffer/line driver with 3-state outputs. Features: High-speed operation: tPD = 8.3 ns (typical) at VCC = 5.0 V Low power dissipation: IC
Stock:10000
Minimum:2
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SOP20
Motorola
04+
Octal 3−State Noninverting Buffer/Line Driver/Line Receiver High−Performance Silicon−Gate CMOS
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SOJ20
FSC
08+PB
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:2
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SOJ5.2mm
Texas Instruments
99+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The SN7407NSR is a quad 2-input NAND gate with open-drain outputs in a SOJ-5.2mm package. Features: Open-drain outputs Low power consumption High noise immunity High speed operation
Stock:10000
Minimum:4
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TSSOP
On Semiconductor
2012+
Low−Voltage CMOS 16−Bit Buffer With 5 V−Tolerant Inputs and Outputs (3−State, Non−Inverting)
Description: Octal Buffer/Line Driver with 3-State Outputs Features: - Low power consumption - High speed operation - Outputs source/sink 24 mA - TTL compatible inputs - Outputs may be paralleled for
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DIP20
National Semiconductor
96
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The MM74HC245AN is a high-speed CMOS octal bus transceiver fabricated with silicon gate C2MOS technology. Features: * High speed: tPD = 8.0 ns (typ.) at VCC = 5V * Low power consumption:
Stock:10000
Minimum:4
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DIP-16P
Harris
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:2
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TVSOP-48
Texas Instruments
08+
3.3-V ABT 16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS
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DIP-24
Texas Instruments
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: The 74AC11244NT is a 4-bit non-inverting buffer/line driver with 3-state outputs. Features: 4-bit non-inverting buffer/line driver 3-state outputs Inputs accept voltages up to 5.5V
Stock:10000
Minimum:1
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SOP-24
Texas Instruments
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:2
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SOP20 7.2
National Semiconductor
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:2
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TSSOP-20
Semiconductor And Storage
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Stock:10000
Minimum:13
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TSSOP
On Semiconductor
1448+
These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation allows for maximum flexibility in timing. The ’HC623 devices allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending upon the logic levels at the output-enable (OEAB and OEBA\) inputs. OEAB and OEBA\ disable the device so that the buses are effectively isolated. The dual-enable configuration gives the transceivers the capability to store data by simultaneously enabling OEAB and OEBA\. Each output reinforces its input in this transceiver configuration. When both OEAB and OEBA\ are enabled and all other data sources to the two sets of bus lines are in the high-impedance state, both sets of bus lines (16 total) remain at their last states. The 8-bit codes appearing on the two sets of buses are identical.
Description: Octal Buffer/Line Driver with 3-State Outputs Features: * Low power consumption * High speed operation * TTL compatible inputs * Outputs source/sink 24 mA * Outputs can be wired OR'ed *
Stock:10000
Minimum:2
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