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Description
The SCH5027 is a 3.3V (Super I/O Block is 5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface. It includes Hardware Monitoring capabilities, enhanced Security features, Power Control logic and Motherboard Glue logic.
Title
Super I/O Controller
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- LPC Interface - Programmable Wake-up Event Interface PC99, PC2001 Compliant - ACPI 2.0 Compliant - Multiplexed Command, Address and Data
ized IRQ Support for PCI Systems - PME Interface - ISA Plug-and-Play Compatible Register Set - 25 General Purpose Input/Output Pins - System Management Interrupt - AC Power Failure Recovery - Operating Temperature Range 0oC to
- Licensed CMOS 765B Floppy Disk Controller - Software and Register Compatible withMicrochip's Proprietary 82077AA Compatible Core - Supports One Floppy Drive - Configurable Open Drain/Push-PullOutput Drivers - Supports Vertical Recording Format - 16-Byte Data FIFO - 100% IBM® Compatibility - Detects All Overrun and Underrun Conditions - Sophisticated Power Control Circuitry (PCC) Including Multiple Powerdown Modes for Reduced Power Consumption - DMA Enable Logic - Data Rate and Drive Control Registers - 480 Address, Up to Eight IRQ and Three DMA Options - Support 3 Mode FDD - Enhanced Digital Data Separator - 2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps, 250 Kbps Data Rates - Programmable Precompensation Modes
- Two Full Function Serial Ports - High Speed NS16C550A Compatible UARTs- 8042 Software Compatible - 8 Bit Microcomputer - 2k Bytes of Program ROM - 256 Bytes of Data RAM - Four Open Drain Outputs Dedicated for Key-
board/Mouse Interface - Asynchronous Access to Two Data Registersand One Status Register - Supports Interrupt and Polling Access - 8 Bit Counter Timer - Port 92 Support - Fast Gate A20 and KRESET Outputs
- IDE Reset Output - (4) Buffered PCI Reset Outputs with softwarecontrolled reset capability - default transparent - Front Panel Reset Debouncing and Power Good Signal Generation - Power Supply Turn On Circuitry with Support for power button on PS/2 Keyboard - Resume Reset Signal Generation - SMBus Isolation Circuitry (2 sets external and 1 set internal for Hardware Monitoring Block) - SMBus 2.0 compliant interface for Hardware Monitoring - LED Control (2)
Fan Control - 5 PWM (Pulse width Modulation) Outputs - Two and three piece linear fan function options - Low frequency and high frequency PWM support - 6 Fan Tachometer Inputs - Programmable automatic fan control based on temperature - Interrupt Pin for out-of-limit Fantach Events - Fantach events generate PMEs
Temperature Monitor - Monitoring of Two Remote Thermal Diodes - Processor temperature monitoring by PECI - Internal Ambient Temperature Measurement - Limit Comparison of all Monitored Values - Interrupt Pin for out-of-limit Temperature Indication - Thermal events generate PMEs - Configurable offset for internal or external temperature channels.
Voltage Monitor - Monitor Power supplies at 1.125V, one at 5V, one each for Vccp, Vbat, VTR, and VCC) - Limit Comparison of all Monitored Values - Interrupt Pin for out-of-limit Voltage Indication - Voltage events generate PMEs
Security Features - Security Key Register (32 byte) for Device Authentication3 VID (Voltage Identification) Inputs Phoenix Keyboard BIOS ROM 128-Pin QFP RoHS Compliant Package
DescriptionThe a 3.3V (Super I/O Block is 5V tolerant) PC99/PC2001 compliant Super I/O controller with an LPC interface. SCH5027D-NW also includes Hardware Monitoring capabilities, enhanced Security features, Power Control logic and Motherboard Glue logic.
The SCH5027D-NW's hardware monitoring capability includes temperature, voltage and fan speed monitoring. It has the ability to alert the system to out-of-limit conditions and automatically control the speeds of multiple fans. There are four analog inputs for monitoring external voltages, two at 1.125V, one at 5V and one at 2.25V for Vccp (core processor voltage). There is also internal monitoring of the SIO's VCC, VTR, and Vbat power supplies. The SCH5027D-NW includes support for monitoring two external temperatures via thermal diode inputs and an internal sensor for measuring ambient temperature. The nHWM_INT pin is implemented to indicate out-of-limit temperature, voltage, and FANTACH conditions. The hardware monitoring block of the SCH5027D-NW is accessible via the Sys-
tem Management Bus (SMBus). The same interrupt event reported on the nHWM_INT pin also creates PME wakeup events and speaker alarm annunciation.
The SCH5027D-NW also allows for a two or three piece linear fan function.The Motherboard Glue logic includes various power management and system logic including generation of nRSMRST, SMBus buffers, and buffered PCI reset outputs.
The SCH5027D-NW incorporates complete legacy Super I/O functionality including an 8042 based keyboard and mouse controller, an IEEE 1284, EPP, and ECP compatible parallel port, one serial port that is 16C550A UART compatible, one IrDA 1.0 infrared ports, and a floppy disk controller with Microchip's true CMOS 765B core and enhanced digital data separator, The true CMOS 765B core provides 100% compatibility with IBM PC/XT and PC/AT architectures and is software and register compatible with Microchip's proprietary 82077AA core. System related functionality, which offers flexibility to the system designer, General Purpose I/O control functions, control of two LED's, and fan control using fan tachometer inputs and pulse width modulator (PWM) outputs
The SCH5027D-NW is ACPI 1.0/2.0 compatible and therefore supports multiple low power-down modes. It incorporates sophisticated power control circuitry (PCC), which includes support for keyboard and mouse wake-up events.
The SCH5027D-NW supports the ISA Plug-and-Play Standard register set (Version 1.0a). The I/O Address, DMA Channel and hardware IRQ of each logical device in the SCH5027D-NW may be reprogrammed through the internal configuration registers. There are (960 - Parallel Port) I/O address location options, a Serialized IRQ interface, and Three DMA channels.
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and enhanced as new volumes and updates are introduced. If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via E-mail at docerrors@microchip.com. We welcome your feedback.
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at: http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page. The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for current devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the revision of silicon and revision of document to which it applies. To determine if an errata sheet exists for a particular device, please check with one of the following: Microchip's Worldwide Web site; http://www.microchip.com Your local Microchip sales office (see last page) When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are using.
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11 buyer reviews from Singapore
George Chan
Length of registration:16 years
The goods have been received. The packaging is very good. By the way, there are not a few in the list. The logistics is also very fast
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09/02/2022
Vincent Loh
Length of registration:5 years
Good
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03/18/2019
Steven Tan
Length of registration:6 years
Very satisfied with
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11/28/2018
Doris Boo
Length of registration:14 years
Very well-packed
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01/05/2017
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SCH5027D-NW
SCH5027D-NW has several brands around the world that may have alternate names for SCH5027D-NW due to regional differences or acquisition. SCH5027D-NW may also be known as the following names:
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