K4D263238D-QC50
Category: IC Chips
Description: 1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL
Price range ($)
3.24802 4.19100
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K4D263238D-QC50
K4D263238D-QC50 has several brands around the world that may have alternate names for K4D263238D-QC50 due to regional differences or acquisition. K4D263238D-QC50 may also be known as the following names:
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Description
K4D263238D-QC50
Stock:9999 |
Samsung 0310+ |
1M x 32Bit x 4 Banks Double Data Rate Synchronous DRAM with Bi-directional Data Strobe and DLL |
≥1: US $4.19100 US $3.77190 ≥5: US $3.98145 US $3.58331 ≥10: US $3.77190 US $3.39471 ≥20: US $3.66712 US $3.30041 ≥50: US $3.56235 US $3.20612 ≥100: US $3.45758 US $3.11182 ≥200: US $3.35280 US $3.01752 ≥500: US $3.31089 US $2.97980 ≥1000: US $3.24802 US $2.92322
More:
Inquiry
|
K4D263238D-QC50
Stock:266 |
SAM 12+ |
N/A |
≥1: US $3.77190 US $3.39471
More:
Inquiry
|
FEATURES
● 2.5V ± 5% power supply
● SSTL_2 compatible inputs/outputs
● 4 banks operation
● MRS cycle with address key programs
— Read latency 3,4 (clock)
— Burst length (2, 4, 8 and Full page)
— Burst type (sequential & interleave)
● Full page burst length for sequential burst type only
● Start address of the full page burst should be even
● All inputs except data & DM are sampled at the positive going edge of the system clock
● Differential clock input
● No Write Interrupted by Read function
● Data I/O transactions on both edges of Data strobe
● DLL aligns DQ and DQS transitions with Clock transition
● Edge aligned data & data strobe output
● Center aligned data & data strobe input
● DM for write masking only
● Auto & Self refresh
● 32ms refresh period (4K cycle)
● 100pin TQFP package
● Maximum clock frequency up to 250MHz
● Maximum data rate up to 500Mbps
GENERAL DESCRIPTION
FOR 1M x 32Bit x 4 Bank DDR SDRAM
The K4D263238D is 134,217,728 bits of hyper synchronous data rate Dynamic RAM organized as 4 x 1,048,576 words by 32 bits, fabricated with SAMSUNG′s high performance CMOS technology. Synchronous features with Data Strobe allow extremely high performance up to2.0GB/s/chip.I/O transactions are possible on both edges of the clock cycle. Range of operating frequencies, programmable burst length and programmable latencies allow the device to be useful for a variety of high performance memory system applications.
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Freight calculation
Express:(FEDEX, UPS, DHL, TNT)Free shipping on first 0.5kg for orders over 200$,Overweight will be charged separately
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